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Protocol analysis
R&S
®
MXO 5 Series
310User Manual 1802.3369.02 ─ 02
The R&S MXO 5 supports all operating speed modes: high-speed, fast mode plus, fast
mode, and standard mode.
Data transfer
The format of a simple I²C message (frame) with 7-bit addressing consists of the fol-
lowing parts:
●
Start condition: a falling slope on SDA while SCL is high
●
7-bit address of the target device that either is written to or read from
●
R/W bit: specifies if the data is written to or read from the target
●
ACKnowledge bits: is issued by the receiver of the previous byte if the transfer was
successful
Exception: At read access, the controller terminates the data transmission with a
NACK bit after the last byte.
●
Data: several data bytes with an ACK bit after every byte
●
Stop condition: a rising slope on SDA while SCL is high
Figure 13-5: I2C writes access with 7-bit address
Address types: 7-bit and 10-bit
Target addresses can be 7 bits or 10 bits long. A 7-bit address requires 1 byte, 7 bits
for the address followed by the R/W bit.
A 10-bit address for write access requires 2 bytes: the first byte starts with the reserved
sequence 11110, followed by the two MSB of the address and the write bit. The second
byte contains the remaining 8 LSB of the address. The target acknowledges each
address byte.
Figure 13-6: 10-bit address, write access
A 10-bit address for read access requires 3 bytes. The first 2 bytes are identical to the
write access address. The third byte repeats the address bits of the first byte and sets
the read bit.
I²C (option R&S
MXO5-K510)
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