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Remote Operation
Status Reporting16
16-7
bit to be set in the Standard Event Status Register, a value of 2 to be placed in the Query
Error Register and the response formatter to be reset thus clearing the output queue. The
parser will then start parsing the next <PROGRAM MESSAGE UNIT> from the input
queue.
The section below on Status Reporting provides further information on these three error
handling proc
esses.
GPIB Parallel Poll
Complete parallel poll capabilities are offered on this generator. The Parallel Poll Enable
Register is set to specify
which bits in the Status Byte Register are to be used to form the
ist local message The Parallel Poll Enable Register is set by the
*
PRE <nrf>
command and read by the
*
PRE? command. The value in the Parallel Poll Enable
Register is ANDed with the Status By
te Register; if the result is zero then the value of
ist is 0; otherwise the value of ist is 1.
The instrument must also be configured so that the value of ist can be returned to the
controller dur
ing a parallel poll operation. The instrument is configured by the controller
sending a Parallel Poll Configure command (PPC) followed by a Parallel Poll Enable
command (PPE). The bits in the PPE command are as follows:
bit 7 = x don't care
bit 6 = 1
bit 5 = 1
bit 4 = 0
parallel poll enable
bit 3 = sense sense of the response bit; 0 = low, 1 = high
bit 2 = ?
bit 1 = ?
bit 0 = ?
bit position of the response
For example: to return the RQS bit (bit 6 of the Status Byte Register) as a 1 when true
and a 0 when false in bit position 1 in response to a parallel poll operation, send the
following commands
*
PRE 64<pmt>, then PPC followed by 69H (PPE)
The parallel poll response from the generator will then be 00H if RQS is 0 and 01H if
RQS is 1.
During parallel poll response the DIO interface lines are resistively terminated (passive
ter
mination). This allows multiple devices to share the same response bit position in
either wired-AND or wired-OR configuration, see IEEE 488.1 for more information.
Status Reporting
This section describes the complete status model of the instrument. Note that some
registers are specific to the GPIB section of the instrument and are of limited use in an
RS232 environment.
Standard Event Status and Standard Event Status Enable Registers
These two registers are implemented as required by the IEEE std. 488.2.
Any bits set in the Standard Event Status Register which correspond to bits set in the
Standard Event Status Enable Register
will cause the ESB bit to be set in the Status Byte
Register.
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