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7.16 SPI Trigger
SPI (serial peripheral interface) can connect the host with peripheral equipment in serial way to
communication. It’s full duplex and synchronous communication bus. It’s usually use 4 signal connecting
line, MOSI: master data output, slave data input; MISO: master input, slave data output; SCLK: clock
signal generated by master; CS: chip select enable signal from slave.
SPI interface is mainly used for synchronous serial data transfer between the host and low-speed
peripheral equipment. Under the shift pulse of the host, the data is transferred bit by bit, the high bit in
front and behind is the low bit. SPI interface is widely used because it does not require slave address
addressing, which is full duplex communication and the protocol is simple. SPI protocol transfer is shown
in the following figure,
(1) SCL Source
When SCL source is selected, it can set either CH1 or CH2 as the clock input of SPI decoding signal.
(2) MOSI Source
When MOSI source is selected, it can set either CH1 or CH2 as MOSI input of SPI decoding signal.
(3) MISO Source
When MISO source selected, it can set either CH1 or CH2 as MISO input of SPI decoding signal.
(4) SCLK Polarity
SCLK edge, set the edge of clock signal: rising edge, falling edge.
a. Rising edge: triggered on the rising edge of the clock signal.
b. Falling edge: triggered on the falling edge of the clock signal.
(5) MOSI Polarity
It can set MOSI polarity of data signal: positive / negative polarity.
a. Positive: It is 1 when setting signal is greater than the threshold, otherwise it is 0.
b. Negative: It is 1 when setting signal is small than the threshold, otherwise it is 0.
(6) MISO Polarity
It can set MISO polarity of data signal: positive / negative polarity.
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