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CD-C1H/CP-C1H
– 52 –
1 DEFI Input Input terminal of defect detection signal (DEF). (Connected to OV when not used.)
2 TA1 Input For PLL Input terminal for test. Pull-down resistor is integrated. Surely connected to 0V.
3 PDO Output Output terminal of phase comparison for external VCO control.
4 VVSS — Ground terminal for integrated VCO. Surely connected to 0V.
5 ISET Input Resistance connection terminal for current adjustment of PDO output.
6 VVDD — Power terminal for integrated VCO.
7 FR Input VCO frequency range adjustment.
8 VSS — Ground terminal of digital system. Surely connected to 0V.
9 EFMO Output For slice level control EFM signal output terminal.
10 EFMIN Input EFM signal input terminal.
11 TEST2 Input Input terminal for test. Pull-down resistor is integrated. Surely connected to 0V.
12 CLV+ Outout Output for disk motor control. 3 values can be output with the commands.
13 CLV- Output Output for disk motor control. 3 values can be output with the commands.
14 V/P Output Monitor output terminal for automatic switch of rough servo/phase control.
"H" for rough servo, and "L" for phase servo.
15 HFL Intput Input terminal of track detection signal. Schmit input.
16 TES Input Input terminal of tracking error signal. Schmit input.
17 TOFF Output Tracking OFF output terminal.
18 TGL Output Output terminal for switch of tracking gain "L" increases the gain.
19 JP+ Output Output for track jump control. 3 values can be output with the commands.
20 JP- Output Output for track jump control. 3 values can be output with the commands.
21* PCK Output Clock monitor terminal for EFM data replay. 4,3218MHz as the phase clock.
22* FSEQ Output Output terminal synchronous signal detection. "H" is output when synchronous signal detected
by EFM signal matches synchronous signal internally generated.
23 VDD — Power terminal of digital system.
24 CONT1 Output OPEN direction
25 CONT2 Output CLOSE direction
26 CONT3 Output Cam motor forward rotation
27 CONT4 Output Cam motor reverse rotation
28 CONT5 Output Cam motor speed selection High speed "L" Low speed "H"
29* EMPH Output Difference monitor terminal At "H", deemphasis disk is being replayed.
30* C2F Output C2 flag output terminal.
31 DOUT Output Output terminal of digital OUTPUT. (EIAJ format)
32* TEST3 Input Input terminal for test. Pull-down resistor is integrated. Surely connected to 0V.
33 TEST4 Input Input terminal for test. Pull-down resistor is integrated. Surely connected to 0V.
34 PCCL — Terminal not use. Ground terminal.
35* MUTEL Output L channel 1 bit DAC Mute output terminal for L channel.
36 LVDD — Power terminal for L channel.
37 LCHO Output L channel output terminal.
38 LVSS — Ground terminal for L channel Surely connected to 0V.
39 RVSS — R channel 1 bit DAC Ground terminal for R channel Surely connected to 0V.
40 RCHO Output R channel output terminal.
41 RVDD — Power terminal for R channel.
42* MUTER Output Mute output terminal for R channel.
43 XVDD — Power terminal for quartz oscillation.
44 XOUT Output Ground terminal of 16.9344 MHz quartz oscillator.
45 XIN Input Ground terminal of 16.9344 MHz quartz oscillator.
46 XVSS — Ground terminal for quartz oscillation. Surely connected to 0V.
47* SBSY Output Output terminal of synchronous signal of subcode block.
48* EFLG Output Correction monitor terminal of C1, C2, single and double.
Pin No. FunctionTerminal Name
Input/Output
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
IC2 VHiLC78622K-1: Servo/Signal Control (LC78622K) (1/2)
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